The dual function ECC system described and claimed in the above-identified application functions to alternately correct a single random 1-bit error in a data word having M-1 data byte positions and one check type position, or a multi-bit error in one byte position where the defective byte position in the data word is known.
The location of the defective byte position is determined by generating an M bit word parity vector for each M byte word. The M bit vector is generated by checking each byte of the word for parity by generating a parity bit which is stored with the byte and parity checking the byte as it is read from storage. If an error occurs in the data byte between the time it is stored and read out, the parity bit will indicate a single-bit error 100% of the time and a multi-bit error in the byte only 50% of the time. However, if it is assumed that multi-bit errors result only from a component failing in the system, the same byte position of each data word will be affected since each byte of the word has been stored in a different failure independent memory unit. The M bit vectors that are generated after a unit fails will, therefore, provide sufficient data to conclude on a probability basis that a specific unit has failed.
The above arrangement for determining the defective byte location operates quite satisfactorily but requires that the storage unit have the capacity to store one additional data bit for each byte. If conventional 8-bit bytes are employed, the capacity of the unit for storing user data is reduced by about 12%.
The present invention is directed to a dual function ECC method and system which requires the memory to store only one additional 8-bit byte for a relatively large number of data words (for example, 40 or more) where each data word still only includes one check byte position, as in the system of the above related disclosure. The one additional byte, referred to as a block parity byte, permits the defective byte position to be identified when processed by the improved system and method of the present invention.
It is, therefore, an object of the present invention to provide an improved dual function ECC system.
Another object of the present invention is to provide a dual function ECC system for a memory which requires only a minimum of storage space in the memory for ECC information.
A further object of the present invention is to provide an improved dual function ECC system which requires only one additional byte position for a relatively large number of multi-byte data words.
A still further object of the present invention is to provide in a dual function ECC system an improved method for determining the location of a defective byte position in a data word to permit the appropriate multi-bit error pattern to be developed for each word from their associated dual function single syndrome bytes.
Other objects and advantages will be apparent from the following description of a preferred embodiment of the invention as illustrated in the accompanying drawings.